SC is the International Conference for
High Performance Computing, Networking,
Storage and Analysis



SCHEDULE: NOV 12-18, 2011

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Determining code segments that can benefit from execution on GPUs

SESSION: Research Poster Reception

EVENT TYPE: ACM Student Research Competition Poster, Poster, Electronic Poster

TIME: 5:15PM - 7:00PM

SESSION CHAIR: Bernd Mohr

AUTHOR(S):Ashay Rane, Saurabh Sardeshpande, James Browne

ROOM:WSCC North Galleria 2nd/3rd Floors

ABSTRACT:
Graphics Processing Units (GPUs) represent a possible means of exploiting large-scale parallelism. Source-to-source transformation tools mapping CPU code to GPU code (e.g. PGI accelerator) are available. But identification of code segments that, when run on a GPU will create a significant performance enhancement, requires expert knowledge of algorithms, architectures, compilers and the program structure. In this work, we demonstrate a reasonably accurate prediction of code segments that can benefit from GPU execution and compare our identified code segments with those that have been manually selected by experts for mapping to GPUs. The characterization uses the PerfExpert tool for multicore chip optimization to obtain the measurements on the code segments while a new tool, MACPO, is used for characterization of data structure execution properties. The poster describes the characterization process, gives the results of applying the process to the Rodina parallel benchmarks and gives the assumptions and limitations of the process.

Chair/Author Details:

Bernd Mohr (Chair) - Juelich Supercomputing Centre

Ashay Rane - University of Texas at Austin

Saurabh Sardeshpande - University of Texas at Austin

James Browne - University of Texas at Austin

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